244 lines
6.7 KiB
Plaintext
244 lines
6.7 KiB
Plaintext
/*
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Linker File for Renesas RZ/N2L FSP
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*/
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MEMORY
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{
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ATCM : ORIGIN = 0x00000000, LENGTH = 0x00020000
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BTCM : ORIGIN = 0x00100000, LENGTH = 0x00020000
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SYSTEM_RAM : ORIGIN = 0x10000000, LENGTH = 0x00180000
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SYSTEM_RAM_MIRROR : ORIGIN = 0x30000000, LENGTH = 0x00180000
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xSPI0_CS0_SPACE_MIRROR : ORIGIN = 0x40000000, LENGTH = 0x04000000
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xSPI0_CS1_SPACE_MIRROR : ORIGIN = 0x44000000, LENGTH = 0x04000000
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xSPI1_CS0_SPACE_MIRROR : ORIGIN = 0x48000000, LENGTH = 0x04000000
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xSPI1_CS1_SPACE_MIRROR : ORIGIN = 0x4C000000, LENGTH = 0x04000000
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CS0_SPACE_MIRROR : ORIGIN = 0x50000000, LENGTH = 0x04000000
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CS2_SPACE_MIRROR : ORIGIN = 0x54000000, LENGTH = 0x04000000
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CS3_SPACE_MIRROR : ORIGIN = 0x58000000, LENGTH = 0x04000000
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CS5_SPACE_MIRROR : ORIGIN = 0x5C000000, LENGTH = 0x04000000
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xSPI0_CS0_SPACE : ORIGIN = 0x60000000, LENGTH = 0x04000000
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xSPI0_CS1_SPACE : ORIGIN = 0x64000000, LENGTH = 0x04000000
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xSPI1_CS0_SPACE : ORIGIN = 0x68000000, LENGTH = 0x04000000
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xSPI1_CS1_SPACE : ORIGIN = 0x6C000000, LENGTH = 0x04000000
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CS0_SPACE : ORIGIN = 0x70000000, LENGTH = 0x04000000
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CS2_SPACE : ORIGIN = 0x74000000, LENGTH = 0x04000000
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CS3_SPACE : ORIGIN = 0x78000000, LENGTH = 0x04000000
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CS5_SPACE : ORIGIN = 0x7C000000, LENGTH = 0x04000000
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}
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SECTIONS
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{
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.loader_text 0x00102000 : AT (0x00102000)
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{
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*(.loader_text)
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*/fsp/src/bsp/cmsis/Device/RENESAS/Source/*.o(.text*)
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*/fsp/src/bsp/mcu/all/bsp_clocks.o(.text*)
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*/fsp/src/bsp/mcu/all/bsp_irq.o(.text*)
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*/fsp/src/bsp/mcu/all/bsp_register_protection.o(.text*)
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*/fsp/src/r_ioport/r_ioport.o(.text*)
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KEEP(*(.warm_start))
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} > BTCM
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.loader_data :
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{
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*/fsp/src/bsp/cmsis/Device/RENESAS/Source/*.o(.data*)
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*/fsp/src/bsp/mcu/all/bsp_clocks.o(.data*)
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*/fsp/src/bsp/mcu/all/bsp_irq.o(.data*)
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*/fsp/src/bsp/mcu/all/bsp_register_protection.o(.data*)
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*/fsp/src/r_ioport/r_ioport.o(.data*)
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__loader_bss_start = .;
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*/fsp/src/bsp/cmsis/Device/RENESAS/Source/*.o(.bss*)
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*/fsp/src/bsp/mcu/all/bsp_clocks.o(.bss*)
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*/fsp/src/bsp/mcu/all/bsp_irq.o(.bss*)
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*/fsp/src/bsp/mcu/all/bsp_register_protection.o(.bss*)
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*/fsp/src/r_ioport/r_ioport.o(.bss*)
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*/fsp/src/bsp/cmsis/Device/RENESAS/Source/*.o(COMMON)
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*/fsp/src/bsp/mcu/all/bsp_clocks.o(COMMON)
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*/fsp/src/bsp/mcu/all/bsp_irq.o(COMMON)
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*/fsp/src/bsp/mcu/all/bsp_register_protection.o(.COMMON)
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*/fsp/src/r_ioport/r_ioport.o(.COMMON)
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__loader_bss_end = . ;
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} > BTCM
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.intvec 0x00000000 : AT (0x00000000)
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{
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_fvector_start = .;
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KEEP(*(.intvec))
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_fvector_end = .;
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} > ATCM
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.text 0x30000000 : AT (0x30000000)
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{
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_text_start = .;
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*(.text*)
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KEEP(*(.init))
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KEEP(*(.fini))
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/* .ctors */
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*crtbegin.o(.ctors)
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*crtbegin?.o(.ctors)
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*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
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*(SORT(.ctors.*))
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*(.ctors)
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_ctor_end = .;
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/* .dtors */
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*crtbegin.o(.dtors)
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*crtbegin?.o(.dtors)
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*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
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*(SORT(.dtors.*))
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*(.dtors)
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_dtor_end = .;
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*(.rodata*)
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_erodata = .;
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KEEP(*(.eh_frame*))
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} > SYSTEM_RAM_MIRROR
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.rvectors :
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{
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_rvectors_start = .;
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KEEP(*(.rvectors))
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_rvectors_end = .;
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} > SYSTEM_RAM_MIRROR
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.ARM.extab :
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{
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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} > SYSTEM_RAM_MIRROR
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__exidx_start = .;
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.ARM.exidx :
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{
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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} > SYSTEM_RAM_MIRROR
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__exidx_end = .;
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.got :
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{
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*(.got)
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*(.got.plt)
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_text_end = .;
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} > SYSTEM_RAM_MIRROR
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.data :
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{
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_data_start = .;
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*(vtable)
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*(.data.*)
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*(.data)
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. = ALIGN(4);
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/* preinit data */
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP(*(.preinit_array))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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. = ALIGN(4);
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/* init data */
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP(*(SORT(.init_array.*)))
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KEEP(*(.init_array))
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PROVIDE_HIDDEN (__init_array_end = .);
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. = ALIGN(4);
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/* finit data */
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PROVIDE_HIDDEN (__fini_array_start = .);
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KEEP(*(SORT(.fini_array.*)))
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KEEP(*(.fini_array))
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PROVIDE_HIDDEN (__fini_array_end = .);
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KEEP(*(.jcr*))
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. = ALIGN(4);
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/* All data end */
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_data_end = .;
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} > SYSTEM_RAM_MIRROR
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.bss :
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{
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. = ALIGN(4);
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__bss_start__ = .;
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_bss = .;
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*(.bss*)
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*(COMMON)
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. = ALIGN(4);
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__bss_end__ = .;
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_ebss = .;
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_end = .;
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} > SYSTEM_RAM_MIRROR
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.heap (NOLOAD) :
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{
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. = ALIGN(8);
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__HeapBase = .;
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/* Place the STD heap here. */
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KEEP(*(.heap))
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__HeapLimit = .;
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} > SYSTEM_RAM_MIRROR
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.thread_stack (NOLOAD):
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{
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. = ALIGN(8);
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__ThreadStackBase = .;
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/* Place the Thread stacks here. */
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KEEP(*(.stack*))
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__ThreadStackLimit = .;
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} > SYSTEM_RAM_MIRROR
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.sys_stack (NOLOAD) :
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{
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. = ALIGN(8);
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__SysStackBase = .;
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/* Place the sys_stack here. */
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KEEP(*(.sys_stack))
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__SysStackLimit = .;
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} > BTCM
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.svc_stack (NOLOAD) :
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{
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. = ALIGN(8);
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__SvcStackBase = .;
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/* Place the svc_stack here. */
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KEEP(*(.svc_stack))
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__SvcStackLimit = .;
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} > BTCM
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.irq_stack (NOLOAD) :
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{
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. = ALIGN(8);
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__IrqStackBase = .;
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/* Place the irq_stack here. */
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KEEP(*(.irq_stack))
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__IrqStackLimit = .;
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} > BTCM
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.fiq_stack (NOLOAD) :
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{
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. = ALIGN(8);
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__FiqStackBase = .;
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/* Place the fiq_stack here. */
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KEEP(*(.fiq_stack))
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__FiqStackLimit = .;
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} > BTCM
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.und_stack (NOLOAD) :
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{
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. = ALIGN(8);
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__UndStackBase = .;
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/* Place the und_stack here. */
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KEEP(*(.und_stack))
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__UndStackLimit = .;
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} > BTCM
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.abt_stack (NOLOAD) :
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{
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. = ALIGN(8);
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__AbtStackBase = .;
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/* Place the abt_stack here. */
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KEEP(*(.abt_stack))
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__AbtStackLimit = .;
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} > BTCM
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.shared_noncache_buffer 0x300C0000 : AT (0x300C0000)
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{
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. = ALIGN(32);
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_sncbuffer_start = .;
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KEEP(*(.shared_noncache_buffer*))
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_sncbuffer_end = .;
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} > SYSTEM_RAM_MIRROR
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.noncache_buffer 0x30100000 : AT (0x30100000)
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{
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. = ALIGN(32);
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_ncbuffer_start = .;
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KEEP(*(.noncache_buffer*))
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_ncbuffer_end = .;
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} > SYSTEM_RAM_MIRROR
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}
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