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Author SHA1 Message Date
marble
aec24bf076 cdc_uart: add RTS and DTR pins 2023-09-21 10:56:40 +01:00
11 changed files with 103 additions and 135 deletions

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@@ -50,6 +50,4 @@
#define PICOPROBE_UART_RX_LED 7
#define PICOPROBE_UART_TX_LED 8
#define PROBE_PRODUCT_STRING "Debug Probe (CMSIS-DAP)"
#endif

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@@ -68,6 +68,9 @@
#define PICOPROBE_UART_RX 5
#define PICOPROBE_UART_INTERFACE uart1
#define PICOPROBE_UART_BAUDRATE 115200
/* Flow control - some or all of these can be omitted if not used */
#define PICOPROBE_UART_RTS 9
#define PICOPROBE_UART_DTR 10
#endif
/* LED config - some or all of these can be omitted if not used */
@@ -77,6 +80,4 @@
#define PICOPROBE_UART_RX_LED 7
#define PICOPROBE_UART_TX_LED 8
#define PROBE_PRODUCT_STRING "Example Debug Probe"
#endif

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@@ -45,6 +45,4 @@
#define PICOPROBE_USB_CONNECTED_LED 25
#define PROBE_PRODUCT_STRING "Picoprobe (CMSIS-DAP)"
#endif

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@@ -54,6 +54,17 @@ void cdc_uart_init(void) {
gpio_set_pulls(PICOPROBE_UART_TX, 1, 0);
gpio_set_pulls(PICOPROBE_UART_RX, 1, 0);
uart_init(PICOPROBE_UART_INTERFACE, PICOPROBE_UART_BAUDRATE);
#ifdef PICOPROBE_UART_RTS
gpio_init(PICOPROBE_UART_RTS);
gpio_set_dir(PICOPROBE_UART_RTS, GPIO_OUT);
gpio_put(PICOPROBE_UART_RTS, 1);
#endif
#ifdef PICOPROBE_UART_DTR
gpio_init(PICOPROBE_UART_DTR);
gpio_set_dir(PICOPROBE_UART_DTR, GPIO_OUT);
gpio_put(PICOPROBE_UART_DTR, 1);
#endif
}
void cdc_task(void)
@@ -150,6 +161,13 @@ void tud_cdc_line_coding_cb(uint8_t itf, cdc_line_coding_t const* line_coding)
void tud_cdc_line_state_cb(uint8_t itf, bool dtr, bool rts)
{
#ifdef PICOPROBE_UART_RTS
gpio_put(PICOPROBE_UART_RTS, !rts);
#endif
#ifdef PICOPROBE_UART_DTR
gpio_put(PICOPROBE_UART_DTR, !dtr);
#endif
/* CDC drivers use linestate as a bodge to activate/deactivate the interface.
* Resume our UART polling on activate, stop on deactivate */
if (!dtr && !rts) {

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@@ -47,8 +47,8 @@
// TODO tie this up with PICO_BOARD defines in the main SDK
#include "board_pico_config.h"
//#include "board_debugprobe_config.h"
//#include "board_pico_config.h"
#include "board_debugprobe_config.h"
//#include "board_example_config.h"

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@@ -62,9 +62,8 @@ static struct _probe probe;
void probe_set_swclk_freq(uint freq_khz) {
uint clk_sys_freq_khz = clock_get_hz(clk_sys) / 1000;
picoprobe_info("Set swclk freq %dKHz sysclk %dkHz\n", freq_khz, clk_sys_freq_khz);
uint32_t divider = clk_sys_freq_khz / freq_khz / 4;
if (divider == 0)
divider = 1;
// Worked out with saleae
uint32_t divider = clk_sys_freq_khz / freq_khz / 2;
pio_sm_set_clkdiv_int_frac(pio0, PROBE_SM, divider, 0);
}
@@ -76,39 +75,21 @@ void probe_assert_reset(bool state)
#endif
}
typedef enum probe_pio_command {
CMD_WRITE = 0,
CMD_SKIP,
CMD_TURNAROUND,
CMD_READ
} probe_pio_command_t;
static inline uint32_t fmt_probe_command(uint bit_count, bool out_en, probe_pio_command_t cmd) {
uint cmd_addr =
cmd == CMD_WRITE ? probe.offset + probe_offset_write_cmd :
cmd == CMD_SKIP ? probe.offset + probe_offset_get_next_cmd :
cmd == CMD_TURNAROUND ? probe.offset + probe_offset_turnaround_cmd :
probe.offset + probe_offset_read_cmd;
return ((bit_count - 1) & 0xff) | ((uint)out_en << 8) | (cmd_addr << 9);
}
void probe_write_bits(uint bit_count, uint32_t data_byte) {
DEBUG_PINS_SET(probe_timing, DBG_PIN_WRITE);
pio_sm_put_blocking(pio0, PROBE_SM, fmt_probe_command(bit_count, true, CMD_WRITE));
pio_sm_put_blocking(pio0, PROBE_SM, bit_count - 1);
pio_sm_put_blocking(pio0, PROBE_SM, data_byte);
DEBUG_PINS_SET(probe_timing, DBG_PIN_WRITE_WAIT);
picoprobe_dump("Write %d bits 0x%x\n", bit_count, data_byte);
// Return immediately so we can cue up the next command whilst this one runs
// Wait for pio to push garbage to rx fifo so we know it has finished sending
pio_sm_get_blocking(pio0, PROBE_SM);
DEBUG_PINS_CLR(probe_timing, DBG_PIN_WRITE_WAIT);
DEBUG_PINS_CLR(probe_timing, DBG_PIN_WRITE);
}
void probe_hiz_clocks(uint bit_count) {
pio_sm_put_blocking(pio0, PROBE_SM, fmt_probe_command(bit_count, false, CMD_TURNAROUND));
pio_sm_put_blocking(pio0, PROBE_SM, 0);
}
uint32_t probe_read_bits(uint bit_count) {
DEBUG_PINS_SET(probe_timing, DBG_PIN_READ);
pio_sm_put_blocking(pio0, PROBE_SM, fmt_probe_command(bit_count, false, CMD_READ));
pio_sm_put_blocking(pio0, PROBE_SM, bit_count - 1);
uint32_t data = pio_sm_get_blocking(pio0, PROBE_SM);
uint32_t data_shifted = data;
if (bit_count < 32) {
@@ -120,20 +101,14 @@ uint32_t probe_read_bits(uint bit_count) {
return data_shifted;
}
static void probe_wait_idle() {
pio0->fdebug = 1u << (PIO_FDEBUG_TXSTALL_LSB + PROBE_SM);
while (!(pio0->fdebug & (1u << (PIO_FDEBUG_TXSTALL_LSB + PROBE_SM))))
;
}
void probe_read_mode(void) {
pio_sm_put_blocking(pio0, PROBE_SM, fmt_probe_command(0, false, CMD_SKIP));
probe_wait_idle();
pio_sm_exec(pio0, PROBE_SM, pio_encode_jmp(probe.offset + probe_offset_in_posedge));
while(pio_sm_get_pc(pio0, PROBE_SM) != probe.offset + probe_offset_in_idle);
}
void probe_write_mode(void) {
pio_sm_put_blocking(pio0, PROBE_SM, fmt_probe_command(0, true, CMD_SKIP));
probe_wait_idle();
pio_sm_exec(pio0, PROBE_SM, pio_encode_jmp(probe.offset + probe_offset_out_negedge));
while(pio_sm_get_pc(pio0, PROBE_SM) != probe.offset + probe_offset_out_idle);
}
void probe_init() {
@@ -148,11 +123,13 @@ void probe_init() {
// Set up divisor
probe_set_swclk_freq(1000);
// Jump SM to command dispatch routine, and enable it
pio_sm_exec(pio0, PROBE_SM, offset + probe_offset_get_next_cmd);
// Enable SM
pio_sm_set_enabled(pio0, PROBE_SM, 1);
probe.initted = 1;
}
// Jump to write program
probe_write_mode();
}
void probe_deinit(void)

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@@ -35,11 +35,8 @@
#endif
void probe_set_swclk_freq(uint freq_khz);
// Bit counts in the range 1..256
void probe_write_bits(uint bit_count, uint32_t data_byte);
uint32_t probe_read_bits(uint bit_count);
void probe_hiz_clocks(uint bit_count);
void probe_read_mode(void);
void probe_write_mode(void);

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@@ -1,7 +1,7 @@
/*
* The MIT License (MIT)
*
* Copyright (c) 2021-2023 Raspberry Pi (Trading) Ltd.
* Copyright (c) 2021 Raspberry Pi (Trading) Ltd.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
@@ -23,50 +23,32 @@
*
*/
// Every TX FIFO entry is either a command, or up to 32 bits of data.
// Command format:
//
// | 13:9 | 8 | 7:0 |
// | Cmd | Dir | Count |
//
// Count is the number of bits to be transferred by this command, minus 1.
// Dir is the output enable for the SWDIO pin.
// Cmd is the address of the write_cmd, read_cmd or get_next_cmd label.
//
// write_cmd expects a FIFO data entry, but read_cmd does not.
//
// read_cmd pushes data to the FIFO, but write_cmd does not. (The lack of RX
// garbage on writes allows the interface code to return early after pushing a
// write command, as there is no need in general to poll for a command's
// completion as long as all commands are executed in order.)
//
// The SWCLK period is 4 PIO SM execution cycles.
.program probe
.side_set 1 opt
public write_cmd:
public turnaround_cmd: ; Alias of write, used for probe_oen.pio
pull
write_bitloop:
out pins, 1 [1] side 0x0 ; Data is output by host on negedge
jmp x-- write_bitloop [1] side 0x1 ; ...and captured by target on posedge
; Fall through to next command
.wrap_target
public get_next_cmd:
pull side 0x0 ; SWCLK is initially low
out x, 8 ; Get bit count
out pindirs, 1 ; Set SWDIO direction
out pc, 5 ; Go to command routine
read_bitloop:
nop ; Additional delay on taken loop branch
public read_cmd:
in pins, 1 [1] side 0x1 ; Data is captured by host on posedge
jmp x-- read_bitloop side 0x0
push
.wrap ; Wrap to next command
public out_negedge:
set pindirs, 1 side 0x0 ; Init OE clock 0
public out_idle:
pull ; Pull number of bits to shift -1 from tx fifo and put into output shift register
mov x, osr ; mov bits to shift -1 from output shift register into x
pull ; Pull data to shift out
out_negedge_bitloop:
out pins, 1 side 0x0 ; clock data out on falling edge
jmp x-- out_negedge_bitloop side 0x1 ; data is present for posedge
set pins, 1 side 0x0 ; Drive data high (idle bus state)
push ; Push to rx fifo just so processor knows when done
jmp out_negedge ; Wait for next transaction
public in_posedge:
set pindirs, 0 side 0x0 ; INIT IE clock 0
public in_idle:
pull ; Pull number of bits to shift -1 from tx fifo and put into output shift register
mov x, osr ; mov bits to shift -1 from output shift register into x into x
in_posedge_bitloop:
in pins, 1 side 0x1 ; Generate posedge and read data
jmp x-- in_posedge_bitloop side 0x0 ;
push ; Push to rx fifo when done
jmp in_posedge ; Jump back to start
; Implement probe_gpio_init() and probe_sm_init() methods here - set pins, offsets, sidesets etc
% c-sdk {

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@@ -1,48 +1,39 @@
; Output-enable active-low variant of the SWD probe
; This program is very similar to the one in probe.pio. The only difference is
; that here write_cmd and turnaround_cmd are split into two separate routines,
; whose difference is OEn being high/low.
; SWDIO_OEn is pin 0, SWCLK pin 1, SWDIO (out) pin 2, SWDI (in) pin 3.
; Pin 0 and 1 are sideset pins
.program probe
.side_set 2 opt
public turnaround_cmd:
pull
turnaround_bitloop:
nop [1] side 0x1
jmp x-- turnaround_bitloop [1] side 0x3
jmp get_next_cmd
; SWDIO_OEN is pin 0, SWCLK pin 1, SWDIO (out) pin 2, SWDI (in) pin 3.
; Pin 0 and 1 are sideset pins
public out_negedge:
set pindirs, 0x1 side 0x0 ; OE_N 0, data high, clock 0
public out_idle:
pull ; pull nbits - 1
mov x, osr
pull ; pull data
public out_negedge_bitloop:
out pins, 1 side 0x0
jmp x-- out_negedge_bitloop side 0x2 ; OE_N 0, clock high
set pins, 1 side 0x0 ; drive data high (idle bus state)
push ; Push to rx fifo just so processor knows when done
jmp out_negedge ; Wait for next transaction
public write_cmd:
pull
write_bitloop:
out pins, 1 [1] side 0x0 ; Data is output by host on negedge
jmp x-- write_bitloop [1] side 0x2 ; ...and captured by target on posedge
; Fall through to next command
.wrap_target
public get_next_cmd:
pull side 0x1 ; SWCLK initially low, OEn disabled
out x, 8 ; Get bit count
out pindirs, 1 ; Set SWDIO direction
out pc, 5 ; Go to command routine
read_bitloop:
nop ; Additional delay on taken loop branch
public read_cmd:
in pins, 1 [1] side 0x3 ; Data is captured by host on posedge
jmp x-- read_bitloop side 0x1
push
.wrap ; Wrap to next command
public in_posedge:
set pindirs, 0x0 side 0x1 ; OE_N 1, data high, clock 0
public in_idle:
pull
mov x, osr
in_posedge_bitloop:
in pins, 1 side 0x1 ; OE_N 1, clock 0
jmp x-- in_posedge_bitloop side 0x3 ; OE_N 1, clock 1
push
jmp in_posedge
; Implement probe_gpio_init() and probe_sm_init() methods here - set pins, offsets, sidesets etc
% c-sdk {
static inline void probe_gpio_init()
void probe_gpio_init()
{
#if defined(PROBE_PIN_RESET)
// Target reset pin: pull up, input to emulate open drain pin
@@ -60,10 +51,10 @@ static inline void probe_gpio_init()
gpio_pull_up(PROBE_PIN_SWDIOEN);
}
static inline void probe_sm_init(pio_sm_config* sm_config) {
void probe_sm_init(pio_sm_config* sm_config) {
// Set SWDIOEN and SWCLK as sideset pins
sm_config_set_sideset_pins(sm_config, PROBE_PIN_SWDIOEN);
sm_config_set_sideset_pins(&sm_config, PROBE_PIN_SWDIOEN);
// Set SWDIO offset
sm_config_set_out_pins(sm_config, PROBE_PIN_SWDIO, 1);
@@ -79,4 +70,4 @@ static inline void probe_sm_init(pio_sm_config* sm_config) {
sm_config_set_in_shift(sm_config, true, false, 0);
}
%}
%}

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@@ -133,6 +133,8 @@ uint8_t SWD_Transfer (uint32_t request, uint32_t *data) {
probe_write_bits(8, prq);
/* Turnaround (ignore read bits) */
probe_read_mode();
ack = probe_read_bits(DAP_Data.swd_conf.turnaround + 3);
ack >>= DAP_Data.swd_conf.turnaround;
@@ -152,10 +154,12 @@ uint8_t SWD_Transfer (uint32_t request, uint32_t *data) {
picoprobe_debug("Read %02x ack %02x 0x%08x parity %01x\n",
prq, ack, val, bit);
/* Turnaround for line idle */
probe_hiz_clocks(DAP_Data.swd_conf.turnaround);
probe_read_bits(DAP_Data.swd_conf.turnaround);
probe_write_mode();
} else {
/* Turnaround for write */
probe_hiz_clocks(DAP_Data.swd_conf.turnaround);
probe_read_bits(DAP_Data.swd_conf.turnaround);
probe_write_mode();
/* Write WDATA[0:31] */
val = *data;
@@ -174,9 +178,9 @@ uint8_t SWD_Transfer (uint32_t request, uint32_t *data) {
/* Idle cycles - drive 0 for N clocks */
if (DAP_Data.transfer.idle_cycles) {
for (n = DAP_Data.transfer.idle_cycles; n; ) {
if (n > 256) {
probe_write_bits(256, 0);
n -= 256;
if (n > 32) {
probe_write_bits(32, 0);
n -= 32;
} else {
probe_write_bits(n, 0);
n -= n;
@@ -191,7 +195,8 @@ uint8_t SWD_Transfer (uint32_t request, uint32_t *data) {
/* Dummy Read RDATA[0:31] + Parity */
probe_read_bits(33);
}
probe_hiz_clocks(DAP_Data.swd_conf.turnaround);
probe_read_bits(DAP_Data.swd_conf.turnaround);
probe_write_mode();
if (DAP_Data.swd_conf.data_phase && ((request & DAP_TRANSFER_RnW) == 0U)) {
/* Dummy Write WDATA[0:31] + Parity */
probe_write_bits(32, 0);
@@ -204,6 +209,7 @@ uint8_t SWD_Transfer (uint32_t request, uint32_t *data) {
n = DAP_Data.swd_conf.turnaround + 32U + 1U;
/* Back off data phase */
probe_read_bits(n);
probe_write_mode();
return ((uint8_t)ack);
}

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@@ -133,7 +133,7 @@ char const* string_desc_arr [] =
{
(const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
"Raspberry Pi", // 1: Manufacturer
PROBE_PRODUCT_STRING, // 2: Product
"Debug Probe (CMSIS-DAP)", // 2: Product
usb_serial, // 3: Serial, uses flash unique ID
"CMSIS-DAP v1 Interface", // 4: Interface descriptor for HID transport
"CMSIS-DAP v2 Interface", // 5: Interface descriptor for Bulk transport