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9 Commits

Author SHA1 Message Date
Jonathan Bell
3d4417032f probe: correct SWCLK calculations
Use the actual clk_sys frequency and Round divisors up, otherwise high
swclk speeds get significantly overclocked.
2025-05-14 14:10:48 +01:00
graham sanderson
a7b796d5e6 Revert "Fix variable pathname spacing"
This reverts commit 1abda4c329.
2025-05-14 13:15:45 +01:00
P33M
3a356ea346 Update README.md 2025-03-27 15:53:56 +00:00
Jonathan Bell
c70815a297 Debugprobe release v2.2.2
Point release to address high uart TX baud rate corruption, at the
expense of throughput.

Also skip over an attempt at UART/SDK optimisation that caused issues
for users.
2025-03-13 16:36:24 +00:00
Jonathan Bell
f601757084 Revert "cdc_uart: performance optimisations"
This reverts commit 83e28db1d3.
2025-03-13 11:11:27 +00:00
TankedThomas
1abda4c329 Fix variable pathname spacing
Signed-off-by: TankedThomas <TankedThomas@users.noreply.github.com>
2025-03-11 09:50:23 +00:00
Jonathan Bell
83e28db1d3 cdc_uart: performance optimisations
For RX, do burst reads without the SDK wrapper function which checks
the FIFO flags for each read.

For TX, avoid waiting for the FIFO to have space available, which
causes significant thread stalls. Use a slightly pessimistic estimate
of the number of bytes the TX FIFO should consume and only write up to
that number.

Also, there's no point tracking whether or not the scheduler parked the
thread in a call to xTaskDelayUntil - missing a scheduler tick can't be
recovered from.
2025-01-17 15:14:06 +00:00
Jonathan Bell
3d58384754 cdc_uart: work around suspected TinyUSB FIFO bug
UART TX corruption has been observed at high baud rates. It seems to be
related to thread preemption when a buffer is pushed to the CDC FIFO
while another task is reading/updating FIFO pointers.

If set to 1x wMaxPacket bytes, the FIFO push only occurs when it is
completely empty. This avoids the bug at the cost of some amount of
throughput, usually 1-2 USB packet times plus inter-packet delay.
2025-01-17 15:03:02 +00:00
Jonathan Bell
818ed79f4b Fixes for #160 and #159 2025-01-09 16:34:30 +00:00
7 changed files with 36 additions and 8 deletions

View File

@@ -63,7 +63,7 @@ if (DEBUG_ON_PICO)
OUTPUT_NAME "debugprobe_on_pico2"
)
else ()
error("Unsupported board ${PICO_BOARD}" PICO_BOARD)
message(SEND_ERROR "Unsupported board ${PICO_BOARD}")
endif ()
endif ()

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@@ -9,7 +9,7 @@ Firmware source for the Raspberry Pi Debug Probe SWD/UART accessory. Can also be
# Documentation
Debug Probe documentation can be found in the [Pico Getting Started Guide](https://datasheets.raspberrypi.com/pico/getting-started-with-pico.pdf). See "Appendix A: Using the Debug Probe".
Debug Probe documentation can be found at the [Raspberry Pi Microcontroller Documentation portal](https://www.raspberrypi.com/documentation/microcontrollers/debug-probe.html#about-the-debug-probe).
# Hacking
@@ -22,7 +22,7 @@ cd debugprobe
```
Initialize and update the submodules:
```
git submodule update --init
git submodule update --init --recursive
```
Then create and switch to the build directory:
```

23
blah.patch Normal file
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@@ -0,0 +1,23 @@
diff --git a/include/DAP_config.h b/include/DAP_config.h
index fb02fb1..88c11d9 100755
--- a/include/DAP_config.h
+++ b/include/DAP_config.h
@@ -44,6 +44,7 @@ This information includes:
- Optional information about a connected Target Device (for Evaluation Boards).
*/
#include <pico/stdlib.h>
+#include <hardware/clocks.h>
#include <hardware/gpio.h>
#include "cmsis_compiler.h"
@@ -52,8 +53,8 @@ This information includes:
/// Processor Clock of the Cortex-M MCU used in the Debug Unit.
/// This value is used to calculate the SWD/JTAG clock speed.
-/* Debugprobe actually uses kHz rather than Hz, so just lie about it here */
-#define CPU_CLOCK 125000000U ///< Specifies the CPU Clock in Hz.
+/* Debugprobe uses PIO for clock generation, so return the current system clock. */
+#define CPU_CLOCK clock_get_hz(clk_sys)
/// Number of processor cycles for I/O Port write operations.
/// This value is used to calculate the SWD/JTAG clock speed that is generated with I/O

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@@ -44,6 +44,7 @@ This information includes:
- Optional information about a connected Target Device (for Evaluation Boards).
*/
#include <pico/stdlib.h>
#include <hardware/clocks.h>
#include <hardware/gpio.h>
#include "cmsis_compiler.h"
@@ -52,8 +53,8 @@ This information includes:
/// Processor Clock of the Cortex-M MCU used in the Debug Unit.
/// This value is used to calculate the SWD/JTAG clock speed.
/* Debugprobe actually uses kHz rather than Hz, so just lie about it here */
#define CPU_CLOCK 125000000U ///< Specifies the CPU Clock in Hz.
/* Debugprobe uses PIO for clock generation, so return the current system clock. */
#define CPU_CLOCK clock_get_hz(clk_sys)
/// Number of processor cycles for I/O Port write operations.
/// This value is used to calculate the SWD/JTAG clock speed that is generated with I/O

View File

@@ -61,9 +61,13 @@ static struct _probe probe;
void probe_set_swclk_freq(uint freq_khz) {
uint clk_sys_freq_khz = clock_get_hz(clk_sys) / 1000;
probe_info("Set swclk freq %dKHz sysclk %dkHz\n", freq_khz, clk_sys_freq_khz);
uint32_t divider = clk_sys_freq_khz / freq_khz / 4;
// Round up (otherwise fast swclks get faster)
uint32_t divider = (((clk_sys_freq_khz + freq_khz - 1)/ freq_khz) + 3) / 4;
if (divider == 0)
divider = 1;
if (divider > 65535)
divider = 65535;
pio_sm_set_clkdiv_int_frac(pio0, PROBE_SM, divider, 0);
}

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@@ -75,7 +75,7 @@
* is issued. At high datarates this leads to huge variation in instantaneous
* throughput on USB, so a large runway is needed.
*/
#define CFG_TUD_CDC_RX_BUFSIZE 128
#define CFG_TUD_CDC_RX_BUFSIZE 64
#define CFG_TUD_CDC_TX_BUFSIZE 4096
#define CFG_TUD_VENDOR_RX_BUFSIZE 8192

View File

@@ -48,7 +48,7 @@ tusb_desc_device_t const desc_device =
.idVendor = 0x2E8A, // Pi
.idProduct = 0x000c, // CMSIS-DAP Debug Probe
.bcdDevice = 0x0221, // Version 02.21
.bcdDevice = 0x0222, // Version 02.22
.iManufacturer = 0x01,
.iProduct = 0x02,
.iSerialNumber = 0x03,