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5 Commits
debugprobe
...
pio-progra
| Author | SHA1 | Date | |
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57f5569894 | ||
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ae5bdb082d | ||
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491b96c1d4 | ||
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46eb924601 | ||
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cdc33333c9 |
@@ -50,4 +50,6 @@
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#define PICOPROBE_UART_RX_LED 7
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#define PICOPROBE_UART_TX_LED 8
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#define PROBE_PRODUCT_STRING "Debug Probe (CMSIS-DAP)"
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#endif
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@@ -77,4 +77,6 @@
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#define PICOPROBE_UART_RX_LED 7
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#define PICOPROBE_UART_TX_LED 8
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#define PROBE_PRODUCT_STRING "Example Debug Probe"
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#endif
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@@ -45,4 +45,6 @@
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#define PICOPROBE_USB_CONNECTED_LED 25
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#define PROBE_PRODUCT_STRING "Picoprobe (CMSIS-DAP)"
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#endif
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@@ -47,8 +47,8 @@
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// TODO tie this up with PICO_BOARD defines in the main SDK
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//#include "board_pico_config.h"
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#include "board_debugprobe_config.h"
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#include "board_pico_config.h"
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//#include "board_debugprobe_config.h"
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//#include "board_example_config.h"
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55
src/probe.c
55
src/probe.c
@@ -62,8 +62,9 @@ static struct _probe probe;
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void probe_set_swclk_freq(uint freq_khz) {
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uint clk_sys_freq_khz = clock_get_hz(clk_sys) / 1000;
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picoprobe_info("Set swclk freq %dKHz sysclk %dkHz\n", freq_khz, clk_sys_freq_khz);
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// Worked out with saleae
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uint32_t divider = clk_sys_freq_khz / freq_khz / 2;
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uint32_t divider = clk_sys_freq_khz / freq_khz / 4;
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if (divider == 0)
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divider = 1;
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pio_sm_set_clkdiv_int_frac(pio0, PROBE_SM, divider, 0);
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}
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@@ -75,21 +76,39 @@ void probe_assert_reset(bool state)
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#endif
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}
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typedef enum probe_pio_command {
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CMD_WRITE = 0,
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CMD_SKIP,
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CMD_TURNAROUND,
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CMD_READ
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} probe_pio_command_t;
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static inline uint32_t fmt_probe_command(uint bit_count, bool out_en, probe_pio_command_t cmd) {
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uint cmd_addr =
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cmd == CMD_WRITE ? probe.offset + probe_offset_write_cmd :
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cmd == CMD_SKIP ? probe.offset + probe_offset_get_next_cmd :
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cmd == CMD_TURNAROUND ? probe.offset + probe_offset_turnaround_cmd :
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probe.offset + probe_offset_read_cmd;
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return ((bit_count - 1) & 0xff) | ((uint)out_en << 8) | (cmd_addr << 9);
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}
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void probe_write_bits(uint bit_count, uint32_t data_byte) {
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DEBUG_PINS_SET(probe_timing, DBG_PIN_WRITE);
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pio_sm_put_blocking(pio0, PROBE_SM, bit_count - 1);
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pio_sm_put_blocking(pio0, PROBE_SM, fmt_probe_command(bit_count, true, CMD_WRITE));
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pio_sm_put_blocking(pio0, PROBE_SM, data_byte);
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DEBUG_PINS_SET(probe_timing, DBG_PIN_WRITE_WAIT);
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picoprobe_dump("Write %d bits 0x%x\n", bit_count, data_byte);
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// Wait for pio to push garbage to rx fifo so we know it has finished sending
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pio_sm_get_blocking(pio0, PROBE_SM);
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DEBUG_PINS_CLR(probe_timing, DBG_PIN_WRITE_WAIT);
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// Return immediately so we can cue up the next command whilst this one runs
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DEBUG_PINS_CLR(probe_timing, DBG_PIN_WRITE);
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}
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void probe_hiz_clocks(uint bit_count) {
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pio_sm_put_blocking(pio0, PROBE_SM, fmt_probe_command(bit_count, false, CMD_TURNAROUND));
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pio_sm_put_blocking(pio0, PROBE_SM, 0);
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}
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uint32_t probe_read_bits(uint bit_count) {
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DEBUG_PINS_SET(probe_timing, DBG_PIN_READ);
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pio_sm_put_blocking(pio0, PROBE_SM, bit_count - 1);
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pio_sm_put_blocking(pio0, PROBE_SM, fmt_probe_command(bit_count, false, CMD_READ));
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uint32_t data = pio_sm_get_blocking(pio0, PROBE_SM);
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uint32_t data_shifted = data;
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if (bit_count < 32) {
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@@ -101,14 +120,20 @@ uint32_t probe_read_bits(uint bit_count) {
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return data_shifted;
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}
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static void probe_wait_idle() {
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pio0->fdebug = 1u << (PIO_FDEBUG_TXSTALL_LSB + PROBE_SM);
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while (!(pio0->fdebug & (1u << (PIO_FDEBUG_TXSTALL_LSB + PROBE_SM))))
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;
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}
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void probe_read_mode(void) {
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pio_sm_exec(pio0, PROBE_SM, pio_encode_jmp(probe.offset + probe_offset_in_posedge));
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while(pio_sm_get_pc(pio0, PROBE_SM) != probe.offset + probe_offset_in_idle);
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pio_sm_put_blocking(pio0, PROBE_SM, fmt_probe_command(0, false, CMD_SKIP));
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probe_wait_idle();
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}
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void probe_write_mode(void) {
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pio_sm_exec(pio0, PROBE_SM, pio_encode_jmp(probe.offset + probe_offset_out_negedge));
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while(pio_sm_get_pc(pio0, PROBE_SM) != probe.offset + probe_offset_out_idle);
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pio_sm_put_blocking(pio0, PROBE_SM, fmt_probe_command(0, true, CMD_SKIP));
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probe_wait_idle();
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}
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void probe_init() {
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@@ -123,13 +148,11 @@ void probe_init() {
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// Set up divisor
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probe_set_swclk_freq(1000);
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// Enable SM
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// Jump SM to command dispatch routine, and enable it
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pio_sm_exec(pio0, PROBE_SM, offset + probe_offset_get_next_cmd);
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pio_sm_set_enabled(pio0, PROBE_SM, 1);
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probe.initted = 1;
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}
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// Jump to write program
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probe_write_mode();
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}
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void probe_deinit(void)
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@@ -35,8 +35,11 @@
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#endif
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void probe_set_swclk_freq(uint freq_khz);
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// Bit counts in the range 1..256
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void probe_write_bits(uint bit_count, uint32_t data_byte);
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uint32_t probe_read_bits(uint bit_count);
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void probe_hiz_clocks(uint bit_count);
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void probe_read_mode(void);
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void probe_write_mode(void);
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@@ -1,7 +1,7 @@
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/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2021 Raspberry Pi (Trading) Ltd.
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* Copyright (c) 2021-2023 Raspberry Pi (Trading) Ltd.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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@@ -23,32 +23,50 @@
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*
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*/
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// Every TX FIFO entry is either a command, or up to 32 bits of data.
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// Command format:
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//
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// | 13:9 | 8 | 7:0 |
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// | Cmd | Dir | Count |
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//
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// Count is the number of bits to be transferred by this command, minus 1.
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// Dir is the output enable for the SWDIO pin.
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// Cmd is the address of the write_cmd, read_cmd or get_next_cmd label.
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//
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// write_cmd expects a FIFO data entry, but read_cmd does not.
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//
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// read_cmd pushes data to the FIFO, but write_cmd does not. (The lack of RX
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// garbage on writes allows the interface code to return early after pushing a
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// write command, as there is no need in general to poll for a command's
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// completion as long as all commands are executed in order.)
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//
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// The SWCLK period is 4 PIO SM execution cycles.
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.program probe
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.side_set 1 opt
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public out_negedge:
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set pindirs, 1 side 0x0 ; Init OE clock 0
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public out_idle:
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pull ; Pull number of bits to shift -1 from tx fifo and put into output shift register
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mov x, osr ; mov bits to shift -1 from output shift register into x
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pull ; Pull data to shift out
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out_negedge_bitloop:
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out pins, 1 side 0x0 ; clock data out on falling edge
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jmp x-- out_negedge_bitloop side 0x1 ; data is present for posedge
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set pins, 1 side 0x0 ; Drive data high (idle bus state)
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push ; Push to rx fifo just so processor knows when done
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jmp out_negedge ; Wait for next transaction
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public write_cmd:
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public turnaround_cmd: ; Alias of write, used for probe_oen.pio
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pull
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write_bitloop:
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out pins, 1 [1] side 0x0 ; Data is output by host on negedge
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jmp x-- write_bitloop [1] side 0x1 ; ...and captured by target on posedge
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; Fall through to next command
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.wrap_target
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public get_next_cmd:
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pull side 0x0 ; SWCLK is initially low
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out x, 8 ; Get bit count
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out pindirs, 1 ; Set SWDIO direction
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out pc, 5 ; Go to command routine
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read_bitloop:
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nop ; Additional delay on taken loop branch
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public read_cmd:
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in pins, 1 [1] side 0x1 ; Data is captured by host on posedge
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jmp x-- read_bitloop side 0x0
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push
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.wrap ; Wrap to next command
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public in_posedge:
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set pindirs, 0 side 0x0 ; INIT IE clock 0
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public in_idle:
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pull ; Pull number of bits to shift -1 from tx fifo and put into output shift register
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mov x, osr ; mov bits to shift -1 from output shift register into x into x
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in_posedge_bitloop:
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in pins, 1 side 0x1 ; Generate posedge and read data
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jmp x-- in_posedge_bitloop side 0x0 ;
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push ; Push to rx fifo when done
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jmp in_posedge ; Jump back to start
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; Implement probe_gpio_init() and probe_sm_init() methods here - set pins, offsets, sidesets etc
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% c-sdk {
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@@ -1,39 +1,48 @@
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; Output-enable active-low variant of the SWD probe
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; This program is very similar to the one in probe.pio. The only difference is
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; that here write_cmd and turnaround_cmd are split into two separate routines,
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; whose difference is OEn being high/low.
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; SWDIO_OEn is pin 0, SWCLK pin 1, SWDIO (out) pin 2, SWDI (in) pin 3.
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; Pin 0 and 1 are sideset pins
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.program probe
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.side_set 2 opt
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; SWDIO_OEN is pin 0, SWCLK pin 1, SWDIO (out) pin 2, SWDI (in) pin 3.
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; Pin 0 and 1 are sideset pins
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public out_negedge:
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set pindirs, 0x1 side 0x0 ; OE_N 0, data high, clock 0
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public out_idle:
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pull ; pull nbits - 1
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mov x, osr
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pull ; pull data
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public out_negedge_bitloop:
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out pins, 1 side 0x0
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jmp x-- out_negedge_bitloop side 0x2 ; OE_N 0, clock high
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set pins, 1 side 0x0 ; drive data high (idle bus state)
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push ; Push to rx fifo just so processor knows when done
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jmp out_negedge ; Wait for next transaction
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public turnaround_cmd:
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pull
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turnaround_bitloop:
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nop [1] side 0x1
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jmp x-- turnaround_bitloop [1] side 0x3
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jmp get_next_cmd
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public in_posedge:
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set pindirs, 0x0 side 0x1 ; OE_N 1, data high, clock 0
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public in_idle:
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pull
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mov x, osr
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in_posedge_bitloop:
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in pins, 1 side 0x1 ; OE_N 1, clock 0
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jmp x-- in_posedge_bitloop side 0x3 ; OE_N 1, clock 1
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push
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jmp in_posedge
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public write_cmd:
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pull
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write_bitloop:
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out pins, 1 [1] side 0x0 ; Data is output by host on negedge
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jmp x-- write_bitloop [1] side 0x2 ; ...and captured by target on posedge
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; Fall through to next command
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.wrap_target
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public get_next_cmd:
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pull side 0x1 ; SWCLK initially low, OEn disabled
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out x, 8 ; Get bit count
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out pindirs, 1 ; Set SWDIO direction
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out pc, 5 ; Go to command routine
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read_bitloop:
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nop ; Additional delay on taken loop branch
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public read_cmd:
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in pins, 1 [1] side 0x3 ; Data is captured by host on posedge
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jmp x-- read_bitloop side 0x1
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push
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.wrap ; Wrap to next command
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; Implement probe_gpio_init() and probe_sm_init() methods here - set pins, offsets, sidesets etc
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% c-sdk {
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void probe_gpio_init()
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static inline void probe_gpio_init()
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{
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#if defined(PROBE_PIN_RESET)
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// Target reset pin: pull up, input to emulate open drain pin
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@@ -51,10 +60,10 @@ void probe_gpio_init()
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gpio_pull_up(PROBE_PIN_SWDIOEN);
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}
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void probe_sm_init(pio_sm_config* sm_config) {
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static inline void probe_sm_init(pio_sm_config* sm_config) {
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// Set SWDIOEN and SWCLK as sideset pins
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sm_config_set_sideset_pins(&sm_config, PROBE_PIN_SWDIOEN);
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sm_config_set_sideset_pins(sm_config, PROBE_PIN_SWDIOEN);
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// Set SWDIO offset
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sm_config_set_out_pins(sm_config, PROBE_PIN_SWDIO, 1);
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@@ -70,4 +79,4 @@ void probe_sm_init(pio_sm_config* sm_config) {
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sm_config_set_in_shift(sm_config, true, false, 0);
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}
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%}
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%}
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@@ -133,8 +133,6 @@ uint8_t SWD_Transfer (uint32_t request, uint32_t *data) {
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probe_write_bits(8, prq);
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/* Turnaround (ignore read bits) */
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probe_read_mode();
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ack = probe_read_bits(DAP_Data.swd_conf.turnaround + 3);
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ack >>= DAP_Data.swd_conf.turnaround;
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@@ -154,12 +152,10 @@ uint8_t SWD_Transfer (uint32_t request, uint32_t *data) {
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picoprobe_debug("Read %02x ack %02x 0x%08x parity %01x\n",
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prq, ack, val, bit);
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/* Turnaround for line idle */
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probe_read_bits(DAP_Data.swd_conf.turnaround);
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probe_write_mode();
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probe_hiz_clocks(DAP_Data.swd_conf.turnaround);
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} else {
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/* Turnaround for write */
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probe_read_bits(DAP_Data.swd_conf.turnaround);
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probe_write_mode();
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probe_hiz_clocks(DAP_Data.swd_conf.turnaround);
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/* Write WDATA[0:31] */
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val = *data;
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@@ -178,9 +174,9 @@ uint8_t SWD_Transfer (uint32_t request, uint32_t *data) {
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/* Idle cycles - drive 0 for N clocks */
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if (DAP_Data.transfer.idle_cycles) {
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for (n = DAP_Data.transfer.idle_cycles; n; ) {
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if (n > 32) {
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probe_write_bits(32, 0);
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n -= 32;
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if (n > 256) {
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probe_write_bits(256, 0);
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n -= 256;
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} else {
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probe_write_bits(n, 0);
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n -= n;
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@@ -195,8 +191,7 @@ uint8_t SWD_Transfer (uint32_t request, uint32_t *data) {
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/* Dummy Read RDATA[0:31] + Parity */
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probe_read_bits(33);
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}
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probe_read_bits(DAP_Data.swd_conf.turnaround);
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probe_write_mode();
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probe_hiz_clocks(DAP_Data.swd_conf.turnaround);
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if (DAP_Data.swd_conf.data_phase && ((request & DAP_TRANSFER_RnW) == 0U)) {
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/* Dummy Write WDATA[0:31] + Parity */
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probe_write_bits(32, 0);
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@@ -209,7 +204,6 @@ uint8_t SWD_Transfer (uint32_t request, uint32_t *data) {
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n = DAP_Data.swd_conf.turnaround + 32U + 1U;
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/* Back off data phase */
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probe_read_bits(n);
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probe_write_mode();
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return ((uint8_t)ack);
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}
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@@ -133,7 +133,7 @@ char const* string_desc_arr [] =
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{
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(const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
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"Raspberry Pi", // 1: Manufacturer
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"Debug Probe (CMSIS-DAP)", // 2: Product
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PROBE_PRODUCT_STRING, // 2: Product
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usb_serial, // 3: Serial, uses flash unique ID
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"CMSIS-DAP v1 Interface", // 4: Interface descriptor for HID transport
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"CMSIS-DAP v2 Interface", // 5: Interface descriptor for Bulk transport
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Reference in New Issue
Block a user